In the previous tutorials we have looked in detail at the three different types of basic transistor multivibrator circuits that can be used as relaxation oscillators to produce either a square or rectangular wave at their outputs for use as clock and timing signals.

But it is also possible to construct basic **Waveform Generator** circuits from simple integrated circuits or operational amplifiers connected to a resistor-capacitor ( RC ) tank circuit or to a quartz crystal to produce the required binary or square wave output waveform at the desired frequency.

This waveform generation tutorial would be incomplete without some examples of digital regenerative switching circuits, since it illustrates both the switching action and operation of waveform generators used for generating square waves for use as timing or sequential waveforms.

We know that regenerative switching circuits such as *Astable Multivibrators* are the most commonly used type of relaxation oscillator as they produce a constant square wave output, making them ideal as a digital **Waveform Generator**.

Astable multivibrators make excellent oscillators because they switch continuously between their two unstable states at a constant repetition rate thereby producing a continuous square wave output with a 1:1 mark-space ratio (“ON” and “OFF” times the same) from its output and in this tutorial we will look at some of the different ways we can construct waveform generators using just standard TTL and CMOS logic circuits along with some additional discrete timing components.

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Simple **Waveform Generators** can be constructed using basic Schmitt trigger action inverters such as the TTL 74LS14. This method is by far the easiest way to make a basic astable waveform generator. When used to produce clock or timing signals, the astable multivibrator must produce a stable waveform that switches quickly between its “HIGH” and “LOW” states without any distortion or noise, and Schmitt inverters do just that.

We know that the output state of a Schmitt inverter is the opposite or inverse to that of its input state, (NOT gate principles) and that it can change state at different voltage levels giving it “hysteresis”.

Schmitt inverters use a Schmitt trigger action that changes state between an upper and a lower threshold level as the input voltage signal increases and decreases about the input terminal. This upper threshold level “sets” the output and the lower threshold level “resets” the output which equates to a logic “0” and a logic “1” respectively for an inverter. Consider the circuit below.

This simple waveform generator circuit consists of a single TTL 74LS14 Schmitt inverter logic gate with a capacitor, C connected between its input terminal and ground, ( 0v ) and the positive feedback required for the circuit to oscillate being provided by the feedback resistor, R.

So how does it work?. Assume that the charge across the capacitors plates is below the Schmitt’s lower threshold level of 0.8 volt (Datasheet value). This therefore makes the input to the inverter at a logic “0” level resulting in a logic “1” output level (inverter principals).

One side of the resistor R is now connected to the logic “1” level ( +5V ) output while the other side of the resistor is connected to the capacitor, C which is at a logic “0” level (0.8v or below). The capacitor now starts to charge up in a positive direction through the resistor at a rate determined by the RC time constant of the combination.

When the charge across the capacitor reaches the 1.6 volt upper threshold level of the Schmitt trigger (datasheet value) the output from the Schmitt inverter rapidly changes from a logic level “1” to a logic level “0” state and the current flowing through the resistor changes direction.

This change now causes the capacitor that was originally charging up through the resistor, R to begin to discharge itself back through the same resistor until the charge across the capacitors plates reaches the lower threshold level of 0.8 volts and the inverters output switches state again with the cycle repeating itself over and over again as long as the supply voltage is present.

So the capacitor, C is constantly charging and discharging itself during each cycle between the inputs upper and lower threshold levels of the Schmitt inverter producing a logic level “1” or a logic level “0” at the inverters output. However, the output waveform is not symmetrical producing a duty cycle of about 33% or 1/3 as the mark-to-space ratio between “HIGH” and “LOW” is 1:2 respectively due to the input gate characteristics of the TTL inverter.

The value of the feedback resistor, ( R ) MUST also be kept low to below 1kΩ for the circuit to oscillate correctly, 220R to 470R is good, and by varying the value of the capacitor, C to vary the frequency. Also at high frequency levels the output waveform changes shape from a square shaped waveform to a trapezoidal shaped waveform as the input characteristics of the TTL gate are affected by the rapid charging and discharging of the capacitor. The frequency of oscillation for **Schmitt Waveform Generators** is therefore given as:

With a resistor value between: 100R to 1kΩ, and a capacitor value of between: 1nF to 1000uF. This would give a frequency range of between 1Hz to 1MHz, (high frequencies produce waveform distortion).

Generally, standard TTL logic gates do not work too well as waveform generators due to their average input and output characteristics, distortion of the output waveform and low value of feedback resistor required, resulting in a large high value capacitor for low frequency operation.

Also TTL oscillators may not oscillate if the value of the feedback capacitor is too small. However, we can also make Astable Multivibrators using better CMOS logic technology that operate from a 3V to 15V supply such as the CMOS 40106B Schmitt Inverter.

The CMOS 40106 is a single input inverter with the same Schmitt-trigger action as the TTL 74LS14 but with very good noise immunity, high bandwidth, high gain and excellent input/output characteristics to produce a more “squarer” output waveform as shown below.

The Schmitt waveform generators circuit for the CMOS 40106 is basically the same as that for the previous TTL 74LS14 inverter, except for the addition of the 10kΩ resistor which is used to prevent the capacitor from damaging the sensitive MOSFET input transistors as it discharges rapidly at higher frequencies.

The mark-space ratio is more evenly matched at about 1:1 with the feedback resistor value increased to below 100kΩ resulting in a smaller and cheaper timing capacitor, C. The frequency of oscillation may not be the same as: ( 1/1.2RC ) as CMOS input characteristics are different to TTL. With a resistor value between: 1kΩ and 100kΩ, and a capacitor value of between: 1pF to 100uF. This would give a frequency range of between 0.1Hz to 100kHz.

**Schmitt Inverter Waveform Generators** can also be made from a variety of different logic gates connected to form an inverter circuit. The basic Schmitt astable multivibrator circuit can be easily modified with some additional components to produce different outputs or frequencies. For example, two inverse waveforms or multiple frequencies and by changing the fixed feedback resistor to a potentiometer the output frequency can be varied as shown below.

In the first circuit above, an additional Schmitt Inverter has been added to the output of the Schmitt waveform generator to produce a second waveform that is the inverse or mirror image of the first producing two complementary output waveforms, so when one output is “HIGH” the other is “LOW”. This second Schmitt inverter also improves the shape of the inverse output waveform but adds a small “gate delay” to it so it is not exactly in synch with the first.

Also, the output frequency of the oscillator circuit can be varied by changing the fixed resistor, R into a potentiometer but a smaller feedback resistor is still required to prevent the potentiometer from shorting out the inverter when its at its minimum value, 0Ω’s.

We can also use the two complementary outputs, Q and Q of the first circuit to alternatively flash two sets of lights or LED’s by connecting their outputs directly to the bases of two switching transistors as shown.

In this way one or several LED’s connected together in series with the collector of the switching transistors resulting in alternating flashes of each set of LED’s as each transistor is switched “ON” in turn.

Also when using this type of circuit, remember to calculate a suitable series resistor, R to limit the LED current to below 20mA (red LED’s) for the voltage you are using.

In order to generate a very low frequency output of a few Hertz to flash the LED’s, Schmitt waveform generators use high value timing capacitors which themselves can be physically large and expensive.

One alternative solution is too use a smaller value capacitor to generate a much higher frequency, say 1kHz or 10kHz, and then divide this main clock frequency down into individual smaller ones until the required low frequency value is achieved, and the second circuit above does just that.

The lower circuit above shows the oscillator being used to drive the clock input of a ripple counter. Ripple counters are basically a number of divide-by-2, D-type flip-flops cascaded together to form a single divide-by-N counter, where N is equal to the counters bit-count such as the CMOS 4024 7-bit Ripple Counter or the CMOS 4040 12-bit Ripple Counter.

The fixed clock frequency produce by the Schmitt astable clock pulse circuit is divided into a number of different sub-frequencies such as, ƒ÷2, ƒ÷4, ƒ÷8, ƒ÷256, etc, up to the maximum “Divide-by-n” value of the ripple counter being used. This process of using either “Flip-flops”, “Binary Counters” or “Ripple Counters” to divide a main fixed clock frequency into different sub-frequencies is known as Frequency Division and we can use it to obtain a number of frequency values from a single waveform generator.

**Schmitt Waveform Generators** can also be made using standard CMOS Logic NAND Gates connected to produce an inverter circuit. Here, two NAND gates are connected together to produce another type of RC relaxation oscillator circuit that will generate a square wave shaped output waveform as shown below.

In this type of waveform generator circuit, the RC network is formed from resistor, R1 and the capacitor, C with this RC network being controlled by the output of the first NAND gate. The output from this R1C network is fed back to the input of the first NAND gate via resistor, R2 and when the charging voltage across the capacitor reaches the upper threshold level of the first NAND gate, the NAND gate changes state causing the second NAND gate to follow it, thereby change state and producing a change in the output level.

The voltage across the R1C network is now reversed and the capacitor begins to discharge through the resistor until it reaches the lower threshold level of the first NAND gate causing the two gates to change state once again. Like the previous Schmitt waveform generators circuit above, the frequency of oscillation is determined by the R1C time constant which is given as: 1/2.2R1C. Generally R2 is given a value that is 10 times the value of resistor R1.

When high stability or guaranteed self-starting is required, **CMOS Waveform Generators** can be made using three inverting NAND gates or any three logic inverters for that matter, connected together as shown below producing a circuit that is sometimes called “the ring of three” waveform generator. The frequency of oscillation is determined again by the R1C time constant, the same as for the two gate oscillator above, and which is given as: 1/2.2R1C when R2 has a value that is 10 times the value of resistor, R1.

The addition of the extra NAND gate guarantees that the oscillator will start even with very low capacitor values. Also the stability of the waveform generator is greatly improved as it is less susceptible to power supply variations due to its threshold triggering level being nearly half of the supply voltage.

The amount of stability is mainly determined by the frequency of oscillation and generally speaking, the lower the frequency the more stable the oscillator becomes.

As this type of waveform generator operates at nearly half or 50% of the supply voltage the resultant output waveform has very nearly a 50% duty cycle, 1:1 mark-space ratio. The three gate waveform generator has many advantages over the previous two gate oscillator above but its one big disadvantage is that it uses an additional logic gate.

We have seen above that **Waveform Generators** can be made using both TTL and the better CMOS logic technology with an RC network producing a time delay within the circuit when connected across either one, two or even three logic gates to form a simple RC Relaxation Oscillator. But we can also make waveform generators using just Logic NOT Gates or in other words Inverters without any additional passive components connected to them.

By connecting together any **ODD** number (3, 5, 7, 9 etc) of NOT gates to form a “ring” circuit, so that the output of the ring is connected straight back to the input of the ring the circuit will continue to oscillate as a logic level “1” constantly rotates around the network producing an output frequency that is determined by the propagation delays of the inverters used.

The frequency of oscillation is determined by the total propagation delay of the Inverters used within the ring and which itself is determined by the type of gate technology, TTL, CMOS, BiCMOS that the inverter is made from. Propagation delay or propagation time, is the total time required (usually in Nanoseconds) for a signal to pass straight through the Inverter from a logic “0” arriving at the input to it producing a logic “1” at its output.

Also for this type of ring waveform generator circuit variations in the supply voltage, temperature and load capacitance all affect the propagation delay of logic gates. Generally an average propagation delay time will be given in the manufacturers data sheets for the type of digital logic gates being used with the frequency of oscillation given as:

Where: ƒ is the frequency of Oscillation, n is the number of gates used and Tp is the propagation delay for each gate.

For example, assume that a simple waveform generator circuit has 5 individual Inverters connected together in series to form a **Ring Oscillator**, the propagation delay for each Inverter is given as 8nS. Then the frequency of oscillation will given as:

Of course, this is not really a practical oscillator due mainly to its instability and very high oscillation frequency, 10’s of Megahertz depending upon the type of logic gate technology used, and in our simple example it was calculated as 12.5MHz !!. The ring oscillator output frequency can be “tuned” a little by varying the number of Inverters used within the ring but it is much better to use a more stable RC waveform generator like the ones we have discussed above.

Nevertheless, it does show that logic gates can be connected together to produce logic based waveform generators and badly designed digital circuits with lots of gates, signal paths and feedback loops have been known to oscillate unintentionally.

By using a RC network across the Inverter circuit, the frequency of oscillation can be accurately controlled producing a more practical astable relaxation oscillator circuit for use in many general electronic applications.

In the next tutorial about Waveforms and Waveform Generation, we will examine the 555 Timer which is one of the most popular and versatile integrated circuits ever produced that can generate a wide range of different waveforms and timing signals from monostable to astable multivibrators.

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I want to know wafeform electronic parts in pcB boards , how measurement

passive and active componants?

Please guys, am really in need of your help, can i get a write up or a project copy of the DESIGN OF A NON-DESTRUCTIVE OIL TESTER. I actually need the block and schmatic diagrams. Thanks in anticipation.

hello everyone,

I have tried to simulate the oscillator circuit using schmitt trigger 40106BD_5V in multisim I am getting different frequency of oscillation and not according the formula which is given as f=1/(1.2*R*C). Can please anyone help to find my circuit. I am simulating the exact same circuit.

The Schmitt trigger can produce excellent astable square wave oscillators with just a RC circuit connected around it for feedback. As the capacitor charges and discharges via the feedback resistor, the voltage across its plates reaches the upper and lower threshold trip points with the inverters upper threshold point at around the 65% (2/3rds) of the supply voltage while the lower threshold point occurs around 35% (1/3rd) of the supply voltage.

However, using different logic families whether CMOS or TTL (74LSxx, 74HLSxx, 74HCTxx, etc) will result in different upper and lower trip points resulting in differing operating frequencies and mark-to-space ratios of the output timing waveform. Generally the error in the oscillating frequency for different logic sub-families is not a problem especially at higher frequencies, but can be anywhere from 1.2RC for basic TTL gates up to 1.7RC for fast CMOS types depending on the logic family used.

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thank you

“The basic Schmitt astable multivibrator circuit can be easily modified with some additional components to produce different outputs or frequencies.”

Hi, Great article! Can you please explain how to do the above? Thx!

As above, change the values of R and C for different frequencies, or use as a clock signal to input other digital IC’s