The Logic NAND Gate is a combination of the digital logic AND gate with that of an inverter or NOT gate connected together in series.
The NAND (Not – AND) gate has an output that is normally at logic level “1” and only goes “LOW” to logic level “0” when ALL of its inputs are at logic level “1”. The Logic NAND Gate is the reverse or “Complementary” form of the AND gate we have seen previously.
The logic or Boolean expression given for a logic NAND gate is that for Logical Addition, which is the opposite to the AND gate, and which it performs on the complements of the inputs. The Boolean expression for a logic NAND gate is denoted by a single dot or full stop symbol, ( . ) with a line or Overline, ( ‾‾ ) over the expression to signify the NOT or logical negation of the NAND gate giving us the Boolean expression of: A.B = Q.
Then we can define the operation of a 2input digital logic NAND gate as being:
“If either A or B are NOT true, then Q is true”
A simple 2input logic NAND gate can be constructed using RTL Resistortransistor switches connected together as shown below with the inputs connected directly to the transistor bases. Either transistor must be cutoff “OFF” for an output at Q.
Logic NAND Gates are available using digital circuits to produce the desired logical function and is given a symbol whose shape is that of a standard AND gate with a circle, sometimes called an “inversion bubble” at its output to represent the NOT gate symbol with the logical operation of the NAND gate given as.
Symbol  Truth Table  
2input NAND Gate

B  A  Q 
0  0  1  
0  1  1  
1  0  1  
1  1  0  
Boolean Expression Q = A.B  Read as A AND B gives NOT Q 
Symbol  Truth Table  
3input NAND Gate

C  B  A  Q 
0  0  0  1  
0  0  1  1  
0  1  0  1  
0  1  1  1  
1  0  0  1  
1  0  1  1  
1  1  0  1  
1  1  1  0  
Boolean Expression Q = A.B.C  Read as A AND B AND C gives NOT Q 
As with the AND function seen previously, the NAND function can also have any number of individual inputs and commercial available NAND Gate IC’s are available in standard 2, 3, or 4 input types. If additional inputs are required, then the standard NAND gates can be cascaded together to provide more inputs for example.
The Boolean Expression for this 4input logic NAND gate will therefore be: Q = A.B.C.D
If the number of inputs required is an odd number of inputs any “unused” inputs can be held HIGH by connecting them directly to the power supply using suitable “Pullup” resistors.
The Logic NAND Gate function is sometimes known as the Sheffer Stroke Function and is denoted by a vertical bar or upwards arrow operator, for example, A NAND B = AB or A↑B.
The Logic NAND Gate is generally classed as a “Universal” gate because it is one of the most commonly used logic gate types. NAND gates can also be used to produce any other type of logic gate function, and in practice the NAND gate forms the basis of most practical logic circuits. By connecting them together in various combinations the three basic gate types of AND, OR and NOT function can be formed using only NAND‘s, for example.
As well as the three common types above, ExOr, ExNor and standard NOR gates can be formed using just individual NAND gates.
Commonly available digital logic NAND gate IC’s include:
In the next tutorial about Digital Logic Gates, we will look at the digital logic NOR Gate function as used in both TTL and CMOS logic circuits as well as its Boolean Algebra definition and truth tables.
Thank you so much electronics tutorials to provide this info. in easy and understandable language…
perfect theory easy to understand
Thank you so much , The (Various Logic Gates using only NAND Gates) really helped me ðŸ˜€
Give me schemetic diagram of four inputs and gate by nand gate(2input) followed by an inverter
In the transistor diagram of the NAND gate could you save a NOT gate and get both NAND and AND logic output from a single nand gate?
A NAND gate is basically an AND gate plus a NOT gate in series. If you added a second NOT gate to the output of the NAND configuration to give a second inversion, the two NOT gates would cancel (Idempotent Law) producing an output representing an AND gate function. That is Q = A.B
what will happen if all the inputs of NAND gate are connected togather??
It depends on the input,if input is 1 ,output would be 0 and viceversa
it becomes a not gate (inverter)
thnk you â˜º
i needed this thx m8
thanks
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