In our previous tutorial about FET amplifiers, we saw that simple single stage amplifiers can be made using junction field effect transistors, or JFET’s.

But there are other types of field effect transistors available which can be used to construct and amplifier, and in this tutorial we will look at the MOSFET Amplifier.

Metal-Oxide-Silicon FET, or MOSFET for short, is an excellent choice for small signal linear amplifiers as their input impedance is extremely high making them easy to bias. But for a mosfet to produce linear amplification, it has to operate in its saturation region, unlike the Bipolar Junction Transistor. But just like the BJT, it too needs to be biased around a centrally fixed Q-point.

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Typical MOS Transistor

MOSFETS conduct through a conductive region or path called “the channel”. We can make this conductive channel wider or smaller by applying a suitable gate potential. An electric field induced around the gate terminal by the application of this gate voltage affects the electrical characteristics of the channel, thus the name *field-effect transistor*.

In other words, we can control how the mosfet operates by creating or “enhancing” its conductive channel between the source and drain regions producing a type of mosfet commonly called an n-channel Enhancement-mode MOSFET, which simply means that unless we bias them positively on the gate (negatively for the p-channel), no channel current will flow.

There are large variations in the characteristics of different types of mosfets, and hence the biasing of a mosfet must be done individually. As with the bipolar transistor common emitter configuration, the common source mosfet amplifier needs to be biased at a suitable quiescent value. But first lets remind ourselves of the mosfets basic characteristics and configuration.

Note that the fundamental differences between a Bipolar Junction Transistor and a FET are that a BJT has terminals labelled Collector, Emitter and Base, while a MOSFET has terminals labelled Drain, Source and Gate respectively. Also the MOSFET differs from the BJT in that there is no direct connection between the gate and channel, unlike the base-emitter junction of the BJT, as the metal gate electrode is electrically insulated from the conductive channel giving it the secondary name of Insulated Gate Field Effect Transistor, or IGFET.

We can see that for the n-channel MOSFET (NMOS) above the substrate semiconductor material is *p-type*, while the source and drain electrodes are *n-type*. The supply voltage will be positive. Biasing the gate terminal positive attracts electrons within the p-type semiconductor substrate under the gate region towards it.

This over abundance of free electrons within the p-type substrate causes a conductive channel to appear or grow as the electrical properties of the p-type region invert, effectively changing the p-type substrate into a n-type material allowing channel current to flow.

The reverse is also true for the p-channel MOSFET (PMOS), where a negative gate potential causes a build of holes under the gate region as they are attracted to the electrons on the outer side of the metal gate electrode. The result is that the n-type substrate creates a p-type conductive channel.

So for our n-type MOS transistor, the more positive potential we put on the gate the greater the build-up of electrons around the gate region and the wider the conductive channel becomes. This enhances the electron flow through the channel allowing more channel current to flow from drain to source leading to the name of **Enhancement MOSFET**.

Enhancement MOSFETS, or eMOSFETS, can be classed as normally-off (non-conducting) devices, that is they only conduct when a suitable gate-to-source positive voltage is applied, unlike Depletion type mosfets which are normally-on devices conducting when the gate voltage is zero. However, due to the construction and physics of an enhancement type mosfet, there is a minimum gate-to-source voltage, called the threshold voltage V_{TH} that must be applied to the gate before it starts to conduct allowing drain current to flow.

In other words, an enhancement mosfet does not conduct when the gate-source voltage, V_{GS} is less than the threshold voltage, V_{TH} but as the gates forward bias increases, the drain current, I_{D} (also known as drain-source current I_{DS}) will also increase, similar to a bipolar transistor, making the eMOSFET ideal for use in mosfet amplifier circuits.

The characteristics of the MOS conductive channel can be thought of as a variable resistor that is controlled by the gate. The amount of drain current that flows through this n-channel therefore depends on the gate-source voltage and one of the many measurements we can take using a mosfet is to plot a transfer characteristics graph to show the i-v relationship between the drain current and the gate voltage as shown.

With a fixed V_{DS} drain-source voltage connected across the eMOSFET we can plot the values of drain current, I_{D} with varying values of V_{GS} to obtain a graph of the mosfets forward DC characteristics. These characteristics give the transconductance, gm of the transistor.

This transconductance relates the output current to the input voltage representing the gain of the transistor. The slope of the transconductance curve at any point along it is therefore given as: gm = I_{D}/V_{GS} for a constant value of V_{DS}.

So for example, assume a MOS transistor passes a drain current of 2mA when V_{GS} = 3v and a drain current of 14mA when V_{GS} = 7v. Then:

This ratio is called the transistors static or DC transconductance which is short for “transfer conductance” and is given the unit of Siemens (S), as its amps per volt. Voltage gain of a mosfet amplifier is directly proportional to the transconductance and to the value of the drain resistor.

At V_{GS} = 0, no current flows through the MOS transistors channel because the field effect around the gate is insufficient to create or “open” the n-type channel. Then the transistor is in its cut-off region acting as an open switch. In other words, with zero gate voltage applied the n-channel eMOSFET is said to be normally-off and this “OFF” condition is represented by the broken channel line in the eMOSFET symbol (unlike the depletion types that have a continuous channel line).

As we now gradually increase the positive gate-source voltage V_{GS} , the field effect begins to enhance the channel regions conductivity and there becomes a point where the channel starts to to conduct. This point is known as the threshold voltage V_{TH}. As we increase V_{GS} more positive, the conductive channel becomes wider (less resistance) with the amount of drain current, I_{D} increases as a result. Remember that the gate never conducts any current as its electrical isolated from the channel giving a mosfet amplifier an extremely high input impedance.

Therefore the n-channel enhancement mosfet will be in its cut-off mode when the gate-source voltage, V_{GS} is less than its threshold voltage level, V_{TH} and its channel conducts or saturates when V_{GS} is above this threshold level. When the eMOS transistor is operating in the saturation region the drain current, I_{D} is given by:

Note that the values of k (conduction parameter) and V_{TH} (threshold voltage) vary from one eMOSFET to the next and can not be physically changed as they are specific specification of the material and device geometry which are in-built during the fabrication of the transistor.

The static transfer characteristics curve on the right is generally parabolic (square law) in shape and then linear. The increase in drain current, I_{D} for a given increase in gate-source voltage, V_{GS} determines the slope or gradient of the curve for constant values of V_{DS}.

Then we can see that turning an enhancement MOS transistor “ON” is a gradual process and in order for us to use the MOSFET as an amplifier we must bias its gate terminal at some point above its threshold level.

There are many different ways we can do this from using two separate voltage supplies, to drain feedback biasing, to zener diode biasing, etc, etc. But whichever biasing method we use, we must make sure that the gate voltage is more positive than the source by an amount greater than V_{TH}. In this mosfet amplifier tutorial we will use the now familiar universal voltage divider biasing circuit.

The universal voltage divider biasing circuit is a popular biasing technique used to establish a desired DC operating condition of bipolar transistor amplifiers as well as mosfet amplifiers. The advantage of the voltage divider biasing network is that the MOSFET, or indeed a bipolar transistor, can be biased from a single DC supply. But first we need to know where to bias the gate for our mosfet amplifier.

A mosfet device has three different regions of operation. These regions are called the: *Ohmic/Triode region*, *Saturation/Linear region* and *Pinch-off point*. For a mosfet to operate as a linear amplifier, we need to establish a well-defined quiescent operating point, or Q-point, so it must be biased to operate in its saturation region. The Q-point for the mosfet is represented by the DC values, I_{D} and V_{GS} that position the operating point centrally on the mosfets output characteristics curve.

As we have seen above, the saturation region begins when V_{GS} is above the V_{TH} threshold level. Therefore if we apply a small AC signal which is superimposed on to this DC bias at the gate input, then the MOSFET will act as a linear amplifier as shown.

The common-source NMOS circuit above shows that the sinusoidal input voltage, V_{i} is in series with a DC source. This DC gate voltage will be set by the bias circuit. Then the total gate-source voltage will be the sum of V_{GS} and V_{i}.

The DC characteristics and therefore Q-point (quiescent point) are all functions of gate voltage V_{GS}, supply voltage V_{DD} and load resistance R_{D}.

The MOS transistor is biased within the saturation region to establish the desired drain current which will define the transistors Q-point. As the instantaneous value of V_{GS} increases, the bias point moves up the curve as shown allowing a larger drain current to flow as V_{DS} decreases.

Likewise, as the instantaneous value of V_{GS} decreases (during the negative half of the input sine wave), the bias point moves down the curve and a smaller V_{GS} results in a smaller drain current and increased V_{DS}.

Then in order to establish a large output swing we must bias the transistor well above threshold level to ensure that the transistor stays in saturation over the full sinusoidal input cycle. However, there is a limit on the amount of gate bias and drain current we can use. To allow for maximum voltage swing of the output, the Q-point should be positioned approximately halfway between the supply voltage V_{DD} and the threshold voltage V_{TH}.

So for example, lets assume we want to construct a single stage NMOS common-source amplifier. The threshold voltage, V_{TH} of the eMOSFET is 2.5 volts and the supply voltage, V_{DD} is +15 volts. Then the DC bias point will be 15 – 2.5 = 12.5v or 6 volts to the nearest integer value.

We have seen above that we can construct a graph of the mosfets forward DC characteristics by keeping the supply voltage, V_{DD} constant and increasing the gate voltage, V_{G}. But in order to get a complete picture of the operation of the n-type enhancement MOS transistor to use within a mosfet amplifier circuit, we need to display the output characteristics for different values of both V_{DD} and V_{GS}.

As with the NPN Bipolar Junction Transistor, we can construct a set of output characteristics curves showing the drain current, I_{D} for increasing positive values of V_{G} for an n-channel enhancement-mode MOS transistor as shown.

Note that a p-channel eMOSFET device would have a very similar set of drain current characteristics curves but the polarity of the gate voltage would be reversed.

Previously we look at how to establish the desired DC operating condition to bias the n-type eMOSFET. If we apply a small time-varying signal to the input, then under the right circumstances the mosfet circuit can act as a linear amplifier providing the transistors Q-point is somewhere near the center of the saturation region, and the input signal is small enough for the output to remain linear. Consider the basic mosfet amplifier circuit below.

This simple enhancement-mode common source mosfet amplifier configuration uses a single supply at the drain and generates the required gate voltage, V_{G} using a resistor divider. We remember that for a MOSFET, no current flows into the gate terminal and from this we can make the following basic assumptions about the MOSFET amplifiers DC operating conditions.

Then from this we can say that:

and the mosfets gate-to-source voltage, V_{GS} is given as:

As we have seen above, for proper operation of the mosfet, this gate-source voltage must be greater than the threshold voltage of the mosfet, that is V_{GS} > V_{TH}. Since I_{S} = I_{D}, the gate voltage, V_{G} is therefore equal too:

To set the mosfet amplifier gate voltage to this value we select the values of the resistors, R1 and R2 within the voltage divider network to the correct values. As we know from above, “no current” flows into the gate terminal of a mosfet device so the formula for voltage division is given as:

Note that this voltage divider equation only determines the ratio of the two bias resistors, R1 and R2 and not their actual values. Also it is desirable to make the values of these two resistors as large as possible to reduce their I^{2}R power loss and increase the mosfet amplifiers input resistance.

An common source mosfet amplifier is to be constructed using a n-channel eMOSFET which has a conduction parameter of 50mA/V^{2} and a threshold voltage of 2.0 volts. If the supply voltage is +15 volts and the load resistor is 470 Ohms, calculate the values of the resistors required to bias the MOSFET amplifier at 1/3Vdd. Draw the circuit diagram.

Values given: V_{DD} = +15v, V_{TH} = +2.0v, k = 50mA/V^{2} and R_{D} = 470Ω.

1. Drain Current, I_{D}

2. Gate-source Voltage, V_{GS}

3. Gate Voltage, V_{G}

Thus applying KVL across the mosfet, the drain-source voltage, V_{DS} is given as:

4. Source Resistance, R_{S}

The ratio of the voltage divider resistors, R1 and R2 required to give 1/3V_{DD} is calculated as:

If we choose: R1 = 200kΩ and R2 = 100kΩ this will satisfy the condition of: V_{G} = 1/3V_{DD}. Also this combination of bias resistors will give an input resistance to the mosfet amplifier of approximately 67kΩ’s.

We can take this design one step further by calculating the values of the input and output coupling capacitors. If we assume a lower cut-off frequency for our mosfet amplifier of say, 20Hz, then the values of the two capacitors taking into account the input impedance of the gate biasing network is calculated as:

Then the final circuit for the single stage **MOSFET Amplifier** circuit is given as:

The main goal of a MOSFET amplifier, or any amplifier for that matter, is to produce an output signal that is a faithful reproduction of its input signal but amplified in magnitude. This input signal could be a current or a voltage, but for a mosfet device to operate as an amplifier it must be biased to operate within its saturation region.

There are two basic types of enhancement-mode MOSFETs, n-channel and p-channel and in this mosfet amplifier tutorial we have looked at the n-channel enhancement MOSFET is often referred to as an NMOS, as it can be operated with positive gate and drain voltages relative to the source as opposed to the p-channel PMOS which is operated with negative gate and drain voltages relative to the source.

The saturation region of a mosfet device is its constant-current region above its threshold voltage, V_{TH}. Once correctly biased in the saturation region the drain current, I_{D} varies as a result of the gate-to-source voltage, V_{GS} and not by the drain-to-source voltage, V_{DS} since the drain current is called saturated.

In an enhancement-mode MOSFET, the electrostatic field created by the application of a gate voltage enhances the conductivity of the channel, rather than deplete the channel as in the case of a depletion-mode MOSFET. The threshold voltage is the minimum gate bias required to enable the formation of the channel between the source and the drain. above this value the drain current increases in proportion to (V_{GS} – V_{TH})^{2} in the saturation region allowing it to operate as an amplifier.

Error! Please fill all fields.

In Example #1, designing a MOSFET Amp., one of the given values needed to do the calculations is conduction parameter k. In the specification sheets that I have for several different MOSFET, k is not stated. Without knowing what k is for a particular FET, it is not possible for me to apply this design procedure to configure my particular FET as an amplifier.

The transconduction parameter is a function of both electrical and geometric parameters of the FET’s channel. It is sometimes referred to as: Kn for a NMOS and Kp for a PMOS.

If Id = K * ( Vgs – Vt )^2

then K = Id / ( Vgs – Vt )^2

Thanks for the response. My application is an AC amplifier.

Here is what an expert at allaboutcircuits.com has to say:

“For operation in the saturation region as an AC amplifier, the gain is determined by the Forward Transconductance given in the ‘Electrical Characteristics’ table. ”

So for an AC amplifier,

K = gfs ?

However units are not the same. Units of K is A/V^2. Units of gfs is Siemens.

i want amp

The given amplifier circuit is wrong the output is clipped .Please review.

The voltage gain of the circuit is 2.8, with a 2 volt peak-to-peak input gives an output of 5.6 volts peak-to-peak from a 15 volt supply. Its impossible to be clipped.

Sorry,

mine fault with ac frequency.

This is very easy to study rather than books and interesting.

what is the purpose of Rs? Cant we design the amplifier without it?

i’m doing the project on designing royer oscillator, in this project i used emosfet, but i face problem of biasing the resistors, what i’m supposed to do on it to biase the transistor?

You may find some information about Royers here

Hi Thanks for this good explanation. I have a question on the way of fixing Vd in the numerical example. Is it Vdd/2 or as said in the demonstration( Vdd-Vth)/2 so in thé numerical ex it should be (15-2)/2=6,5 V

can someone explain that to me? how do you get the V_D = V_DD/2 at the beginning of the example?

Hello Zera11, both ways are correct.

Actually, the text says its half way between Vdd and Vth and then proceeds to calculate it incorrectly. The formula is Vth+(Vdd-Vth)/2=8.75V, not 6 volts to the nearest integer value. So it’s 50% out if we’re talking nearest integer values.

best ever ! Nice details .

Good day

This is a wonderful job, well done but am an electronic hobist I want to ask on how I can be getting ur free online lecture.

Yours

Solomon

Hello Oni, There is no online lecture, just read the tutorials.

“But first we need to know were to bias the gate for our mosfet amplifier.”

Please fix this typo in MOSFET Amplifier page – there are so many in this series — you meant to write “WHERE”, not “WERE”. My email address is bogus.